Interviews - Are they nightmares?

Generally I write blogs based on my experiences. This time I am writing this blog based on the bad experience of an young engineer in the interview. In this blog I would like to share some of the guidelines usually interviewers follow during the interview process and explain the main objective of the interview process.

If you think that interviews are the nightmares and interviewers usually harass the interviewees, you are wrong. Interviewers are the brand ambassadors of their organizations. Organizations choose the interviewer very carefully. Usually the organizations choose the experienced technical guys who really know how to extract the best out of a person.

The main objective of interview is to identify the right candidate for the job, not to disrupt the confidence of the interviewee .

Some of the guidelines that interviewers usually follow during the interview process are :

[1] Make the candidate very comfortable - usually we talk about general things like hobbies, climate, travelling experiences etc. This makes the candidate to feel as if he is talking to a well known person.

[2] Explain about organization’s business and culture and the job - We do this mainly to impress the candidate and motivate him to try for the job willingly

[3] Allow candidate to explain and interact more - Do not talk too much about your experiences and achievements. Allow the candidate to explain about his achievements and understand how he is different from others.

[4] Find the best candidate - Do not compete with candidate. He may be smarter than you ... why not? Accept it... and help the organization to find a person who is smarter than you. This is the reason why organizations always choose SMART interviewers

[5] Mind your behavior - Smile, be polite and help the candidate to project himself in the best way. Usually good interviewers provide lot of suggestions, especially to solve the technical puzzles and find out how the candidate performs.

I still remember, when I was waiting at the reception for an interview, the VP of that company came personally and received me. He opened the main door and invited me for the interview. I felt at that moment that I want to work for that organization.

Do not worry about the odd experiences that you had with some immature organizations. Its natural, you will always have some bad experiences in your life. It does not mean that the complete world is lethal ... Forget about the bad experiences, make yourself ready for the next interview.

Mahatma Gandhi said, " Nobody can hurt me without my permission ". That's what strong people do in their life. So, Why don't you ...

How long with first job?

There is no hard and fast rule that defines how long you should stay at first job. But it’s good to stay in your first organization at least for minimum 3 years and gain the skill sets. Your first job helps you to understand many things, what's organization, business process, team work, customer's expectations, meeting deadlines, performance reviews, technology, product development cycle, TTM etc.

Many of the fresher focus only on technology and they are very keen on improving their technical skills. Once they gain the technical skills and project experience, they immediately plan to change the organization for small benefits. But they fail to understand that one must understand the complete business process to grow further and reach senior positions.

At senior level postions, one needs to own the complete product development [RTL/Verification/Synthesis/DFT] or business process and drive the team to achieve the business objectives. Staying in an organization for a considerable time helps you to gain the confidence and take the ownership.

I have seen some people who stay in the company for more than 10 years also. Why you really need to change the organization when you can learn, earn and grow fast? People want to stay at good organizations that care about the employee growth.

VLSI Design Flow

Chip design process goes through various transformations and get you the final product. One needs to understand all the steps of the VLSI design flow when he begins his career in any semiconductor industry.

Product Specification
This is a detailed document that defines the product functionality and features. It’s a golden reference to the complete design team. Let us say you are designing mobile chip. The spec of this chip has the details like, tele conference, email support, audio and video, built-in camera, games, etc.

FRONT-END DESIGN

RTL
Design team drafts one more document called design specification before capturing the Register Transfer Level logics in HDLs. This design specification has all the details that are needed for the hardware design, such as design architecture, RTL block diagram, clock frequency, waveforms, clock domain details, port details, design partition details etc.

One can't easily become RTL designer just by learning HDLs. You need to learn RTL coding style from the experienced designers.

Verification
Verification team drafts an another document called verification plan. This verification plan have all the details needed for the verification, such as TB architecture, coverage models, list of key features to be verified etc. In this verification process, RTL functionality is simulated and verified whether it behaves as per the product specification.

Most of the ASIC re-spins are due to the functional bugs. Verification process is not yet completely automated and its more time consuming than the design implementation process. 70% of the design cycle time is consumed by the verification.

Refer my blog Verification Sigin-off at
http://vlsi-verification.blogspot.com/2008/12/verification-sign-off.html

Synthesis
The verified RTL is synthesized into Gate Level Netlist. This process is completely automated with the help of EDA tools. But still one needs to be good at HDL based design implementation to understand the reports generated by the Synthesizer and explain to the design team about the synthesis related issues.

BACK-END DESIGN

Place and Route

The netlist is basically a list of primitives. All the primitives are placed and connected to form the chip layout. The P&R process is also completely automated. But still one needs to understand the tool very well and try different routing algorithms to implement the design effectively on to the chip.

CHIP IMPLEMENTATION

FPGA
The P&R process produces a binary file as output. This binary data will be used to configure the FPGA. The configured FPGA implements the design functionality.

ASIC
Finally the routed netlist that is called as GDS-II will be sent to the foundry that manufactures the chip as per the technology requirement

Challenge the Economic Recession

Everybody is scared of this economic recession. Industries are not doing well in this downturn. Most of the industries stopped recruiting even experienced engineers. Newspaper stories of Layoffs and Pink Slips threaten us further.

How are you going to face this industry downturn?

I am sure you will try sincerely to get into industry. You will keep on applying to the companies. But in this situation industries might hesitate to consider fresher. If this continues for some time, you would get frustrated and lose your confidence. You may even start thinking of changing your career too. I am not trying to threaten you by exaggerating the current situation. It's natural and the market condition always goes through peaks and slowdowns in a cyclic fashion. So you can't do anything just by worrying about the economic recession. You should plan very carefully how to face it.

Do you want to be idle till this situation becomes normal?

Time is GOLD. I suggest you to utilize this time very usefully. Do some specialized trainings and increase your skill sets. But you need to choose the training institution very carefully. Find out, whether they are really capable of guiding you to do the industry standard projects on your own. The projects that you do will increase the value of your resume. This way you can make yourself ready and face the interviews when the industries start recruiting.

Be positive. Challenge this economic down turn and show to this world who you are... All the best!

You can reach me directly at guru.vlsitech@gmail.com for any help or information that you may require regarding VLSI career,VLSI training institutions etc ..

What is SystemVerilog?

Let us first understand what is Systemverilog [SV]. SV is not something like a brand new hardware verification language. It's built on top of Verilog HDL. All the Verilog language constructs seamlessly work with SV and vice-versa. In common man terms, one can say SystemVerilog is the latest version of Verilog HDL.


Why we need this language?
Basically HDLs are meant for RTL description of the design and they are not good for verification. Some engineers wrongly assume that Verilog is good for verification and VHDL is good for RTL. Actually both HDLs lack many constructs that you need for complex chip level verification.


Usually verification engineers use Hardware Verification Languages [HVLs] like e, Vera to implement the testbenches. RTL designers use HDLs , Verilog or VHDL for the design implementation and SVA/PSL for the assertions. So one needs to learn multiple languages to manage the complete front-end design process.

SystemVerilog is the language that supports everything you need for RTL implementation and verification as well. Being an SV expert, one can easily become front-end designer/verification engineer.

You can directly reach me at guru.vlsitech@gmail.com to know more about SystemVerilog ... VLSI training institutions etc .